1. Field
The field relates to a pixel and an organic light emitting display using the same, and more particularly, to a pixel suitable for realizing high resolution and high frequency and an organic light emitting display using the same.
2. Description of the Related Technology
Various flat panel displays (FPD) having reduced weight and volume when compared to cathode ray tubes (CRT) are being developed. The FPDs include a liquid crystal display (LCD), a field emission display (FED), a plasma display panel (PDP), and an organic light emitting display.
The organic light emitting display displays an image using organic light emitting diodes (OLED) that generate light by re-combination of electrons and holes.
The organic light emitting display is used in the market for personal digital assistants (PDA), MP3 players and mobile telephones due to various advantages such as excellent color reproducibility and small thickness.
The OLED used for the organic light emitting display includes an anode electrode, a cathode electrode, and a light emitting layer formed between the anode electrode and the cathode electrode. The OLED emits light from the light emitting layer when current flows from the anode electrode to the cathode electrode. The amount of light emitted corresponds to the amount of current.
FIG. 1 is a circuit diagram illustrating a pixel adopted by a some organic light emitting displays. Referring to FIG. 1, the pixel includes an OLED, a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, and a capacitor Cst. Each of the first to sixth transistors T1 to T6 includes a gate electrode, a source electrode, and a drain electrode. The capacitor Cst includes a first electrode and a second electrode.
The source electrode of the first transistor T1 is coupled to a first node A, the drain electrode of the first transistor T1 is coupled to a second node B, and the gate electrode of the first transistor T1 is coupled to a third node C.
The source electrode of the second transistor T2 is coupled to a data line Dm and the drain electrode of the second transistor T2 is coupled to the first node A. The gate electrode of the second transistor T2 is coupled to a first scan line Sn. Therefore, a data signal is transmitted to the first node A by a first scan signal input through the first scan line Sn.
The source electrode of the third transistor T3 is coupled to the second node B, the drain electrode of the third transistor T3 is coupled to the third node C, and the gate electrode of the third transistor T3 is coupled to the first scan line Sn. When the third transistor T3 is turned on by the first scan signal transmitted through the first scan line, the potential of the second node B is equal to the potential of the third node C.
The source electrode of the fourth transistor T4 is coupled to an initialization power source Vinit, the drain electrode of the fourth transistor T4 is coupled to the third node C, and the gate electrode of the fourth transistor T4 is coupled to a second scan line Sn−1. The scan signal transmitted to the second scan line Sn−1 transmits the data signal to the pixel in a previous row.
The source electrode of the fifth transistor T5 is coupled to a first pixel power source line ELVDD, the drain electrode of the fifth transistor T5 is coupled to the first node A, and the gate electrode of the fifth transistor T5 is coupled to an emission control line En. Therefore, the first pixel power source ELVDD is selectively transmitted to the first transistor T1 in accordance with the emission control signal transmitted through the emission control line.
The source electrode of the sixth switching transistor T6 is coupled to the third node C, the drain electrode of the sixth switching transistor T6 is coupled to the OLED, and the gate electrode of the sixth switching transistor T6 is coupled to the emission control line En. Therefore, the current that flows from the source electrode of the first transistor to the drain electrode of the first transistor is selectively transmitted to the OLED in accordance with the emission control signal transmitted through the emission control line En.
The first electrode of the capacitor Cst is coupled to the first pixel power source ELVDD and the second electrode of the capacitor Cst is coupled to the third node C. Therefore, when an initialization signal is transmitted to the third node C by the fourth transistor T4, the third node C maintains the initialization voltage because of the capacitor Cst. Then, when the data signal is transmitted to the first transistor T1 by the second transistor T2 and the third transistor T3, the third node C stores the voltage corresponding to the data signal.
The voltage stored in the third node C is as illustrated in EQUATION 1.
                                                                        I                OLED                            =                                                β                  2                                ⁢                                                      (                                          Vgs                      -                      Vth                                        )                                    2                                                                                                        =                                                β                  2                                ⁢                                                      (                                          Vdata                      -                      ELVDD                      +                      Vth                      -                      Vth                                        )                                    2                                                                                                        =                                                β                  2                                ⁢                                                      (                                          Vdata                      -                      ELVDD                                        )                                    2                                                                                        [                  EQUATION          ⁢                                          ⁢          1                ]            
wherein, IOLED represents the current that flows through the OLED, Vgs represents the voltage applied between the gate electrode of the first transistor T1 and the source electrode of the first transistor T1, ELVDD represents the voltage of the first pixel power source, Vth represents the threshold voltage of the first transistor T1, and Vdata represents the voltage of the data signal.
According to EQUATION 1, the current flows through the OLED from the first transistor to correspond to the voltage of the data signal and the voltage of the first pixel power source ELVDD, thus, the threshold voltage is compensated for.
However, since current flows to correspond to the first pixel power source ELVDD and the voltage of the data signal in the pixel, when a difference in the first pixel power source transmitted to the pixels is generated by voltage reduction in the power distribution, the current does not uniformly flow through the pixels.
In addition, when the organic light emitting display has high resolution and receives a high frequency driving signal, the length of one horizontal time is reduced. For example, when the organic light emitting display is driven by 60 Hz with resolution of FHD (full high-definition), the length of the one horizontal time is 14.8 μs. When the organic light emitting display is driven by 120 Hz with resolution of FHD, the length of the one horizontal time is reduced to 7.4 μs.
When the length of the one horizontal time is reduced, time for compensating for the threshold voltage is reduced so that picture quality deteriorates.